Design Linked Incentive (DLI) Scheme

Design Linked Incentive (DLI) Scheme recognises semiconductor chips as critical enablers of healthcare, transport, communications, defence, space, and emerging digital infrastructure. Read here to learn more.

India’s Design Linked Incentive (DLI) Scheme has emerged as a critical pillar of the country’s semiconductor strategy, demonstrating tangible progress in nurturing an indigenous fabless chip design ecosystem.

At a time when global supply-chain disruptions, geopolitical tensions, and technology export controls have exposed vulnerabilities in semiconductor dependence, the DLI scheme highlights India’s shift from being a consumer of chips to becoming a creator of semiconductor intellectual property (IP).

What is the Design Linked Incentive (DLI) Scheme?

The Design Linked Incentive (DLI) Scheme is a central government initiative implemented by the Ministry of Electronics and Information Technology (MeitY) under the broader Semicon India Programme.

Objective:

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• To build a globally competitive, self-reliant semiconductor design ecosystem in India.
• To promote fabless semiconductor companies that design chips while outsourcing fabrication to global foundries.

Why Fabless Design Matters:

Fabless firms occupy the most strategic position in the semiconductor value chain because:

• Design and IP account for over 50% of a chip’s value
• They contribute 20-50% of the Bill of Materials (BoM)
• They drive 30-35% of global semiconductor revenues

Without indigenous design capabilities, even domestic fabrication facilities risk becoming assembly units dependent on foreign IP, undermining technological sovereignty.

Need for the Design Linked Incentive Scheme

India historically lacked strong domestic chip design firms despite a large pool of semiconductor engineers. This created:

• Dependence on imported core technologies
• Limited control over performance, security, and lifecycle of electronic systems
• Vulnerability in strategic sectors such as defence, telecom, space, and critical infrastructure

The DLI scheme addresses this gap by anchoring value creation at the design stage, where economic and strategic returns are highest.

Eligibility and Coverage

The scheme adopts an inclusive framework, covering:

• Startups (as per DPIIT, 2019)
• MSMEs (as per MSME notification, 2020)
• Domestic companies owned and controlled by resident Indian citizens are aligned with FDI policy norms

This ensures participation from early-stage startups to mature domestic firms.

Support by Design Linked Incentive scheme

The DLI scheme supports the entire semiconductor design lifecycle, including:

• Integrated Circuits (ICs)
• Systems-on-Chip (SoCs)
• Chipsets and systems
• Semiconductor IP cores

A strong emphasis is placed on:

• Indigenous design
• Indian ownership of IP
• Deployment in electronic products

Financial Incentives Under DLI

The scheme offers two complementary incentives:

1. Product Design Linked Incentive

• Reimbursement of up to 50% of the eligible design expenditure
• Cap: ₹15 crore per application

2. Deployment Linked Incentive

• 4-6% of net sales turnover
• For a period of five years
• Cap: ₹30 crore
• Subject to minimum sales thresholds and successful product deployment

This structure incentivises both innovation and market success, bridging the gap between lab design and commercialisation.

Design Infrastructure Support: ChipIN Centre

A key strength of the DLI scheme is the creation of shared national infrastructure through the ChipIN Centre, operated by C-DAC.

Facilities Provided

• National EDA (Electronic Design Automation) Tool Grid
• Access to semiconductor IP core repositories
• Multi-Project Wafer (MPW) prototyping
• Post-silicon validation and testing support

By lowering entry barriers, ChipIN democratises access to high-end design tools that are otherwise prohibitively expensive.

Key Achievements

• 24 chip-design projects sanctioned under the DLI scheme
• Focus areas include:
  • Video surveillance and security
  • Drone detection systems
  • Smart energy meters
  • Indigenous microprocessors
  • Satellite communications
  • Broadband and IoT SoCs

Ecosystem Impact:

• ChipIN Centre has supported nearly 1 lakh engineers and students
• Engagement across  around 400 organisations
• Extensive adoption of the national EDA Grid reflects growing design capacity and ecosystem maturity

Strategic Significance for India

• Technological Sovereignty: Indigenous chip design reduces dependence on foreign IP and mitigates risks from export controls and sanctions.
• Economic Value Addition: Capturing the design layer ensures higher domestic value creation compared to fabrication alone.
• Startup-Led Innovation: Encourages deep-tech startups, positioning India as a global hub for fabless innovation.
• National Security: Trusted chips are essential for defence, space, telecom, power grids, and digital public infrastructure.
• Complementarity with Manufacturing: DLI complements fabrication incentives under the Semicon India Programme, ensuring India does not build “empty fabs” without domestic design demand.

Challenges Ahead

• Scaling from pilot projects to globally competitive volumes
• Ensuring access to advanced foundries for cutting-edge nodes
• Strengthening talent retention and industry–academia linkages
• Integrating DLI outcomes with upcoming semiconductor fabs

Conclusion

The Design Linked Incentive Scheme marks a decisive shift in India’s semiconductor strategy, from dependence on imports to design-led self-reliance. By focusing on fabless innovation, IP ownership, and shared infrastructure, the DLI scheme addresses the most critical chokepoint in the semiconductor value chain.

Its early successes demonstrate that India’s semiconductor ambitions are no longer aspirational but increasingly execution-driven, laying the foundation for long-term technological and strategic autonomy.